GaN-based transistors are typically of the normally-on type due to the spontaneous formation of a polarization-doped two dimensional electron gas (2DEG) at the AlGaN/GaN interface. However, normally-off type devices are desirable in a number of applications and particularly in high voltage power-switching applications, where the normally-off functionality reduces power consumption and improves safety. High-voltage power-switching devices also require a high breakdown voltage in addition to a low on-resistance. Methods of making AlGaN/GaN transistors normally-off include gate recess etching, fluorine plasma exposure, the use of thin or low Al-composition AlGaN barrier layers, p-type depletion layers, etc. Any method for fabrication of a normally-off device should ideally not compromise the breakdown voltage of the device and should maintain a low on-resistance. Another issue is charge trapping at the drain side of the gate, which can result in a phenomenon known as “current collapse” under high-voltage operation. To avoid current collapse, the surface of the device must be passivated by a dielectric material that has a high-quality interface with GaN (typically SiN).
The prior art includes flourine-treated normally-off type GaN devices, as described by K. S. Boutros, S. Burnham, D. Wong, K. Shinohara, B. Hughes, D. Zehnder, and C. Mcguire, “Normally-off 5 A/1100V GaN-on-Silicon Device for high Voltage applications”, International Electron Devices Meeting 2009; and hybrid MOS-HFET devices which utilize a single dielectric layer as a gate insulator and surface passivation layer as described by H. Kambayashi, Y. Satoh, S. Ootomo, T. Kokawa, T. Nomura, S. Kato, and T. P. Chow, “Over 100 A normally-off AlGaN/GaN hybrid MOS-HFET on Si substrate with high-breakdown voltage”, Solid State Elec., vol. 54 issue 6 pp. 660-664 (2010), and T. Oka and T. Nozawa, “AlGaN/GaN recessed MIS-Gate HFET with high threshold voltage normally-off operation for power electronics applications”, IEEE Elec Dev. Lett. vol. 29 no. 7 (2008).
The disadvantages of Flourine-treated devices include poor threshold voltage uniformity and reliability. The disadvantages of prior art MOS-HFET devices, which use a thick SiO2 or SiN layer as both a gate dielectric and a passivation layer, include poor channel mobility and on-resistance due to a poor quality, thick, low k dielectric under the gate, as well as poor surface passivation by SiO2, and threshold voltage hysteresis due to a poor quality interface between the gate dielectric and underlying epitaxial material.
These types of “hybrid” MOS- or MIS-HFET devices are known to result in a normally-off device with a high breakdown voltage. However, these hybrid MOS-HFET devices have the disadvantage of low electron mobility in the active region under the gate due to a poor quality interface between the gate dielectric and the underlying GaN, resulting in increased on-resistance compared to a traditional GaN HFET.
What is needed is a device with a normally-off operation with low gate current, high breakdown voltage, and low on-resistance, as well as low threshold voltage hysteresis and current collapse. The embodiments of the present disclosure answer these and other needs.